
Verilog Snippets
Source (link to git-repo or to original if based on someone elses unmodified work):
Description:
Small list of verilog snippets for general use (loop blocks, flip-flops, mux, etc). Any suggestion or contribution is welcomed. Last changelog:
v0.1 - Added the first set of snippets.
v0.2 - Added log2 snippet. Fixed several snippets after testing and simulations.
v0.3 - Fixed more errors and added generic state machine.
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